20 mhz to 500 mhz if gain block preliminary technical data ADL5534 rev. prd 5/07 information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781.329.4700 www.analog.com fax: 781.461.3113 ?2007 analog devices, inc. all rights reserved. features functional block diagram fixed gain of 20 db operation up to 500 mhz 1 rfin1 2 nc 3 nc 4 rfin2 11 clin1 12 rfout1 10 rfout2 9clin2 5 g n d 6 7 g n d 8 1 5 g n d 1 6 g n d 1 4 g n d 1 3 g n d ADL5534 g n d g n d +41.8 dbm oip3 at 70 mhz noise figure 2.5 db at 70 mhz temperature and power supply stable power supply: 5 v power supply current: 90 ma per amplifier 1000 v esd (class 1c) figure 1. block diagram general description the ADL5534 contains two broadband, fixed-gain, linear amplifiers in an 4x4 mm lfcsp package and operates at frequencies up to 500 mhz. the device can be used in a wide variety of wired and wireless devices including cellular, gsm and wcdma, and broadband applications. the ADL5534 has a fixed gain 20 db and is stable over frequency, temperature, power supply and from device to device. it achieves an oip3 of 41.8 dbm with an output compression point of +20.2 dbm and a noise figure of 2.5 db. the ADL5534 is single-ended and internally matched to 50 with an input return loss of 10 db. only input/output ac- coupling capacitors, a power supply decoupling capacitor and external inductor are required for operation. this if amplifier operates with supply voltage of +5v, consuming 90 ma of supply current per amplifier. fabricated on a gaas hbt process and has an esd rating of 1000 v (class 1c). the device is packaged in a 4mm x 4mm lfcsp that uses an exposed paddle for excellent thermal impedance and operates from ?40c to +85c. a fully populated evaluation board is available.
ADL5534 preliminary technical data rev. prd 5/07 | page 2 of 9 table of contents features .............................................................................................. 1 functional block diagram .............................................................. 1 general description ......................................................................... 1 revision history ............................................................................... 2 specifications ..................................................................................... 3 absolute maximum ratings ............................................................ 4 esd caution ...................................................................................4 pin configuration and function descriptions ..............................5 typical performance characteristics ..............................................6 evaluation board ...................................................................7 outline dimensions ...............................................................9 ordering guide .....................................................................9 revision history 5/07rev. prd: preliminary version
preliminary technical data ADL5534 rev. prd 5/07 | page 3 of 9 specifications v cc = 5 v, t = 25c, unless otherwise noted. table 1. parameter conditions min typ max unit overall function frequency range 20 500 mhz gain vs. frequency 50 mhz. center frequency = 190 mhz or 380 mhz 0.15 db input return loss (s11) 30 mhz to 500 mhz -10 db output return loss (s22) 30 mhz to 500 mhz -10 db isolation (rfin1 to rfout2 and rfin2 to rfout1) frequency = 200 mhz -29.8 db isolation (rfin1 to rfout2 and rfin2 to rfout1) frequency = 500 mhz -22.5 db frequency = 70 mhz gain 19.8 db vs. temperature ?40c t a +85c .25 db output 1 db compression point 20.0 dbm output third-order intercept ?f = 1 mhz, output power (p out ) = 0 dbm (per tone) 41.8 dbm noise figure 2.5 db frequency = 190 mhz gain 19.4 db vs. temperature ?40c t a +85c .25 db output 1 db compression point 20.2 dbm output third-order intercept ?f = 1 mhz, output power (p out ) = 0 dbm (per tone) 40.1 dbm noise figure 2.7 db frequency = 380 mhz gain 18.8 db vs. temperature ?40c t a +85c .25 db output 1 db compression point 20.1 dbm output third-order intercept ?f = 1 mhz, output power (p out ) = 0 dbm (per tone) 37.0 dbm noise figure 2.9 db power interface pins rfout, vcc supply voltage 4.75 5 5.25 v supply current current consumption is specified per amplifier 90 ma vs. temperature ?40c t a +85c (specified per amplifier) 104 ma power dissipation vpos = 5v (specified per amplifier) 450 mw
ADL5534 preliminary technical data rev. prd 5/07 | page 4 of 9 absolute maximum ratings table 2. parameter rating stresses above those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. supply voltage, vpos 5.5 v input power per amplifier(re: 50 ) +12 dbm 650 mw internal power dissipation per amplifier (paddle soldered) ja (paddle soldered) tbd c/w 150 c maximum junction temperature ?40c to +85c esd caution operating temperature range ?65c to +150c storage temperature range (soldering 60 sec) 240c
preliminary technical data ADL5534 rev. prd 5/07 | page 5 of 9 pin configuration and fu nction descriptions pin 1 indicator 1 rfin1 2 nc 3 nc 4 rfin2 11 clin1 12 rfout1 10 rfout2 9clin2 5 6 7 g n d 8 1 5 g n d 1 6 g n d 1 4 g n d 1 3 g n d top view (not to scale) ADL5534 g n d g n d g n d figure 2. table 3. pin function descriptions pin no. mnemonic description 1, 3 rfin1, rfin2 rf input: requires a dc blocking capacitor. use a 10 nf capacitor for normal operation. 10, 12 rfout1, rfout2 rf output and bias: dc bias is provided to this pin through an inductor. a 470 nh inductor is recommended for normal operation. rf path requires a dc blocking capacitor. use a 10 nf capacitor for normal operation. gnd ground. connect this pin to a low impedance ground plane. 5, 6, 7,8, 13,14,15,16 2, 4 nc no connect. 9, 11 clin1, clin2 a 1 nf capacitor connected between 9 and ground an pin11 and ground provides decoupling for the on board linearizer. internally connected to gnd. solder to a low impedance ground plane exposed paddle
ADL5534 preliminary technical data rev. prd 5/07 | page 6 of 9 typical performance characteristics 0.0 5.0 10.0 15.0 20.0 25.0 30.0 35.0 40.0 45.0 0 100 200 300 400 500 600 frequency (mhz) nf, gain,p1db, oip3 (db, dbm) nf gain p1db oip3 -30 -28 -26 -24 -22 -20 -18 -16 -14 -12 -10 -8 -6 -4 -2 0 0 100 200 300 400 500 600 freq (mhz) returnloss & isolation (db) s11 db s12 db s22 db figure 3 ADL5534 gain, noise figure, oip3 and p1db vs frequency figure 5 ADL5534 input / output return loss and reverse isolation vs frequency 22 24 26 28 30 32 34 36 38 40 42 44 46 48 -6 -4 -2 0 2 4 6 8 10 12 14 16 18 20 pout (dbm) oip3 - dbm 3b_20mhz_5v 3b_70mhz_5v 3b_190mhz_5v 3b_380mhz_5v 3b_500mhz_5v figure 4 ADL5534 oip3 vs pout and frequency
preliminary technical data ADL5534 rev. prd 5/07 | page 7 of 9 evaluation board figure 6 shows the schematic for the adl5531 evaluation board. the board is powered by a single 5 v supply. the components used on the board are listed in. table 4 applying 5v to vpos will bias the amplifier corresponding to rfin1 - rfout2. applying 5 v tovpos1 will bias the amplifier corresponding to rfin2 C rfout2 to bias both amplifiers from a single supply, connect 5v to vpos or vpos1 and attach a jumper across w3 c5 c6 c16 r6 open 1 nf 1 nf vpos vpos1 gnd c13 open c14 open c2 10nf r2 open open r4 open r8 open t2 adt2-1 t-1p c4 10nf l1 470 nh l2 470 nh c7 10 nf 10 nf 1 uf 1 uf c9 c8 c10 w1 rfout1 rfout2 nc nc nc rfin1 clin1 nc 13 7 8 9 10 11 12 14 15 16 1 2 3 4 5 z1 ADL5534 6 rfin2 nc nc nc nc nc nc clin2 t1 adt2-1 t-1p rfin1 rfin2 r5 open r1 open r7 open r3 open c1 10nf c3 10nf c15 open c11 c12 open open gnd w2 w3 vpos vpos1 figure 6. evaluation board schematic table 4. evaluation board configuration options component function default value c1, c2, c3, c4 ac-coupling capacitors. 10 nf 0402 c5, c6 provides decoupling for the on board linearizer. 1 nf 0603 optional components used for configuring ADL5534 as a balanced amplifier. open 0603 r1, r2, r3, r4, r5, r6, r7 r8 t1, t2 t1 and t2 are 50 t o100 impedance tran sformers used to configure the ADL5534 as a balanced amplifier. t1 and t2 are us ed to present a 100 differential impedance to the ADL5534. minicircuits adt2-1t-1p open optional components used for configuring adl 5534 as a balanced amplifier. c11-c14: open 0402 c11, c12, c13, c14, c15, c16 c15,c16: open 0402 c9, c10 power supply decoupling capacitors capacitor. 1 uf 0603 c7, c8 power supply decoupling capacitors capacitor. 10 nf 0603 l1, l2 dc bias inductor. 470 nh 1008cs vcc & gnd clip-on terminals for power supply. vcc red gnd black w1,w2 2-pin jumper for connection of ground and supply via cable. w3 2-pin jumper use to connect vpos to vpos1 open
ADL5534 preliminary technical data rev. prd 5/07 | page 8 of 9 figure 7. evaluation board layout (top) figure 8. evaluation board layout (bottom)
preliminary technical data ADL5534 rev. pr d 5/07 | pa g e 9 of 9 outline dimensions fi g u r e 9 . 1 6 -l e a d l e ad f r a m e chi p s c a l e p a c k a g e [lfc s p _ v q] 4 m m 4 m m bod y , v er y t h in , qua d l ead cp-16-13 di m e nsi o ns sh o w n i n m i l l i m e t e r s ordering guide model t e mpe r a tu r e r a nge p a c k age descr i ption p a c k age o p tion b r anding o r dering q u a n ti t y ADL5534 a c p z - r7 ?40c to +85c 8- l ead lfcsp t a pe and r eel c p -16-13 1 ADL5534 a c p z - wp ?40c to +85c 8- l e ad lfcsp w a e p a ck c p -16-13 1 ADL5534- e v al z e v alu a tion boa r d 1 z = pb-fre e part. ?2007 a n alo g d e vices, inc. all ri g h ts rese r v ed . tr a d emarks a n d registere d trad e m a rks are t h e prop er t y o f t h eir r e specti v e ow n e rs. pr06836-0-5/07(prd) compliant to jedec standards mo-220-vggc . 1 0.65 bsc 0.60 max pin 1 indicator 1.95 bcs 0.50 0.40 0.30 0.25 min 3.75 bsc sq top view 12 max 0.80 max 0.65 typ seating plane pin 1 indicator coplanarity 0.08 1.00 0.85 0.80 0.30 0.23 0.18 0.05 max 0.02 nom 0.20 ref 4.00 bsc sq 2.65 2.50 sq 2.35 16 5 13 8 9 12 4 exposed pad bottom view 031006-a
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